Top 10 chipfoundry.io Competitors

riscv.org

When: September 21 – 25, 2026 Where: Córdoba CARLA is an international conference aimed at providing a forum to foster growth and strength of the High Performance Computing (HPC) community in...

tinytapeout.com

IHP 130nm work funded by GF180MCU work funded by GF180MCU runs sponsored by SKY130 early bird sponsored by Chip imaging by Team Tiny Tapeout would not be possible without a lot of people helping. We would especially like to thank: Uri Shaked for Wokwi development and lots more Patrick Deegan for PCBs, software, documentation, SpASICs and lots more Sylvain Munaut for help with scan chain improvements Tim Edwards and Harald Pretl for ASIC expertise Alexander Mordvintsev for the GDS simulation Mike Thompson and Mitch Bailey for verification expertise Jix for formal verification support Proppy for help with GitHub actions Maximo Balestrini for all the amazing renders and the interactive GDS viewer James Rosenthal for coming up with digital design examples Jeremy Birch for help with STA All the people who took part in Tiny Tapeout 1 and volunteered time to improve docs and test the flow The team at YosysHQ and all the other open source EDA tool makers Jeff and the Efabless Team for running the shuttles and providing OpenLane and sponsorship Tim Ansell and Google for supporting the open source silicon movement Zero to ASIC course community for all your support Electronic Cats for their support in the translation into Spanish Salik Abbasi for the intro animation on the videos

weebit-nano.com

Our ReRAM (or RRAM) NVM memory technology is ideal for IoT, MCU, Analog, Power & Secure ICs, providing higher performance with lower costs

chipsalliance.org

CHIPS Alliance’s latest Deep Dive Cafe featured an outstanding talk by a Google physical design engineer, Young-Joon Lee, who has a PhD from Georgia Tech, and has been working on machine learning physical design projects for the past two years. The chip placement problem is a notoriously challenging design problem, and has been explored in the electronic design automation research and development community for years. For those unfamiliar with the problem, it involves finding the optimal placement of physical cells implementing the logical function on a chip image to minimize performance, power, and area of the silicon, which in the end affects the cost of the product. The effort by Google to apply machine learning to the placement problem started as part of the Google Brain effort, which in part focuses on running algorithms at scale on large amounts of data.

zerotoasiccourse.com

Learn how to make your own chips!

skywatertechnology.com

If you’re searching for an exciting culture where you can grow, while helping to pioneer a dynamic workplace, consider joining SkyWater!

electronicsweekly.com

Amey Deosthali, Senior Director, Embedded Product Marketing, talks about how AI is shaping the future of industrial robotics, from real-time decision making to increased autonomy on the factory floor. The discussion covers system performance, adaptability, and the growing role of intelligent automation in modern manufacturing.

semiconductor-digest.com

Each day is filled with news and articles surrounding the Phoenix debut and all the latest industry news! Catch up on all the issues here.

docs.qmk.fm

documentation for qmk firmware