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Contributors include: Alon Amid, Krste Asanovic, Allen Baum, Alex Bradbury, Tony Brewer, Chris Celio, Aliaksei Chapyzhenka, Silviu Chiricescu, Ken Dockser, Bob Dreyer, Roger Espasa, Sean Halle, John Hauser, David Horner, Bruce Hoult, Bill Huffman, Nicholas Knight, Constantine Korikov, Ben Korpan, Hanna Kruppe, Yunsup Lee, Guy Lemieux, Grigorios Magklis, Filip Moc, Rich Newell, Albert Ou, David Patterson, Colin Schmidt, Alex Solomatnikov, Steve Wallach, Andrew Waterman, Jim Wilson. 1. Changes from v1.0-rc2 1.1. Clarified that this it the frozen version for public review. 2. Introduction This document is version 1.0 of the RISC-V vector extension for public review. Note This version 1.0 is considered frozen for public review as part of the RISC-V International ratification process. Version 1.0 is considered stable enough to begin developing toolchains, functional simulators, and implementations, including in upstream software projects, and is not expected to have incompatible changes except if serious issues are discovered during ratification. Once ratified, the spec will be given version 2.0. This spec includes the complete set of currently frozen vector instructions. Other instructions that have been considered during development but are not present in this document are not included in the review and ratification process, and may be completely revised or abandoned. Section Standard Vector Extensions lists the standard vector extensions and which instructions and element widths are supported by each extension. 3. Implementation-defined Constant Parameters Each hart supporting a vector extension defines two parameters: The maximum size in bits of a vector element that any operation can produce or consume, ELEN ≥ 8, which must be a power of 2. The number of bits in a single vector register, VLEN ≥ ELEN, which must be a power of 2, and must be no greater than 216. Standard vector extensions (Section Standard Vector Extensions) and architecture profiles may set further c

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2020年8月 の記事 RISC-V 協会 | RISC-V Association